#include "zf_common_headfile.h"
#include "ScnsInclude.h"

static int32 timer6Us,timer7Us,uart6Us,exti95Us,dma14Us;

int32 dmaWaitMaxUs;

void isrAddMenu()
{
    scnsMenuAddConst(0,timer6Us,,SCNS_TYPE_INT32);
    scnsMenuAddConst(0,timer7Us,,SCNS_TYPE_INT32);
    scnsMenuAddConst(0,exti95Us,,SCNS_TYPE_INT32);
    scnsMenuAddConst(0,dmaWaitMaxUs,,SCNS_TYPE_INT32);
}

void HardFault_Handler(void)
{
#if defined(SCNS_YING_ENABLE)&&SCNS_YING_ENABLE==1
    scnsYingErrorHandler(0,0,__FILE__,__LINE__,NULL);
#endif
    while(1);
}

/**
 * SysTick_Handler
 */
void SysTick_Handler(void)
{
#if defined(SCNS_TIMER_ENABLE)&&SCNS_TIMER_ENABLE==1
    scnsTimerSysTickHandler();
#endif
}

void MemManage_Handler(void)
{
#if defined(SCNS_YING_ENABLE)&&SCNS_YING_ENABLE==1
    scnsYingErrorHandler(0,0,__FILE__,__LINE__,NULL);
#endif
    while(1);
}

void BusFault_Handler(void)
{
#if defined(SCNS_YING_ENABLE)&&SCNS_YING_ENABLE==1
    scnsYingErrorHandler(0,0,__FILE__,__LINE__,NULL);
#endif
    while(1);
}

void UsageFault_Handler(void)
{
#if defined(SCNS_YING_ENABLE)&&SCNS_YING_ENABLE==1
    scnsYingErrorHandler(0,0,__FILE__,__LINE__,NULL);
#endif
    while(1);
}

void NMI_Handler(void)
{
#if defined(SCNS_YING_ENABLE)&&SCNS_YING_ENABLE==1
    scnsYingErrorHandler(0,0,__FILE__,__LINE__,NULL);
#endif
    while(1);
}

void SVC_Handler(void)
{
    while(1);
}

void DebugMon_Handler(void)
{
    while(1);
}

void PendSV_Handler(void)
{
    while(1);
}

void TIM1_UP_IRQHandler(void)
{
    
    TIM_ClearInterruptStatus((TIM_Type*)TIM1,TIM_GetInterruptStatus((TIM_Type*)TIM1));
}

void TIM2_IRQHandler(void)
{
    
    TIM_ClearInterruptStatus((TIM_Type*)TIM2,TIM_GetInterruptStatus((TIM_Type*)TIM2));
}

void TIM3_IRQHandler(void)
{
    
    TIM_ClearInterruptStatus((TIM_Type*)TIM3,TIM_GetInterruptStatus((TIM_Type*)TIM3));
}

void TIM4_IRQHandler(void)
{
    
    TIM_ClearInterruptStatus((TIM_Type*)TIM4,TIM_GetInterruptStatus((TIM_Type*)TIM4));
}

void TIM5_IRQHandler(void)
{
    
    TIM_ClearInterruptStatus((TIM_Type*)TIM5,TIM_GetInterruptStatus((TIM_Type*)TIM5));
}

void TIM6_IRQHandler(void)
{
    const uint64 t=scnsTimerGetUs();
#if defined(SCNS_LED_ENABLE)&&SCNS_LED_ENABLE==1
    scnsLedToggleAfter(SCNS_LED_1,500000);
#endif
#if defined(SCNS_TOUCH_SCREEN_ENABLE)&&SCNS_TOUCH_SCREEN_ENABLE==1
    scnsTouchScreenScan();
#endif
#if defined(SCNS_TM1638_ENABLE)&&SCNS_TM1638_ENABLE==1
    scnsTm1638Sync(SCNS_TM1638_1);
#endif
#if defined(SCNS_KEYBOARD_GPIO_ENABLE)&&SCNS_KEYBOARD_GPIO_ENABLE==1
    scnsKeyboardGpioInterrupt();
#endif
#if defined(SCNS_KEY_ENABLE)&&SCNS_KEY_ENABLE==1
    scnsKeyCallback();
#endif
#if defined(SCNS_POWER_ENABLE)&&SCNS_POWER_ENABLE==1
    scnsPowerInterrupt();
#endif
#if defined(SCNS_BMP280_ENABLE)&&SCNS_BMP280_ENABLE==1
    scnsBmp280Interrupt(SCNS_BMP280_1);
#endif
#if defined(SCNS_TOF10120_ENABLE)&&SCNS_TOF10120_ENABLE==1
    scnsTof10120Interrupt(SCNS_TOF10120_1);
#endif
#if defined(SCNS_TCS3472_ENABLE)&&SCNS_TCS3472_ENABLE==1
    scnsTcs3472Interrupt(SCNS_TCS3472_1);
#endif
#if defined(SCNS_PMW3901_ENABLE)&&SCNS_PMW3901_ENABLE==1
    scnsPmw3901Interrupt(SCNS_PMW3901_1);
#endif
#if defined(SCNS_VL53L0X_ENABLE)&&SCNS_VL53L0X_ENABLE==1
    scnsVl53l0xInterrupt(SCNS_VL53L0X_1);
#endif
#if defined(SCNS_APDS9960_ENABLE)&&SCNS_APDS9960_ENABLE==1
    scnsApds9960Interrupt(SCNS_APDS9960_1);
#endif
    timer6Us=scnsTimerGetUs()-t;
    if(scnsMenuCanPageSend(0))
    {
        scnsSmctpExtOscilloscopeSend(SCNS_SMCTP_CHANNEL_VISUAL_SCOPE,timer6Us,timer7Us,uart6Us,exti95Us,dma14Us);
        uart6Us=0;
    }
    TIM_ClearInterruptStatus((TIM_Type*)TIM6,TIM_GetInterruptStatus((TIM_Type*)TIM6));
}

void TIM7_IRQHandler(void)
{
    const uint64 t=scnsTimerGetUs();
#if defined(SCNS_ZF_DM1TA_ENABLE)&&SCNS_ZF_DM1TA_ENABLE==1
    scnsZfDm1taStart(SCNS_ZF_DM1TA_1,0);
#endif
#if defined(SCNS_BEEP_ENABLE)&&SCNS_BEEP_ENABLE==1
    scnsBeepInterrupt();
#endif
#if defined(SCNS_GYRO_ENABLE)&&SCNS_GYRO_ENABLE==1
    scnsGyroInterrupt(SCNS_GYRO_1);
#endif
#if defined(SCNS_SMCTP_ENABLE)&&SCNS_SMCTP_ENABLE==1
    scnsSmctpFlushBuf();
#endif
#if defined(SCNS_ZF_DM1TA_ENABLE)&&SCNS_ZF_DM1TA_ENABLE==1
    scnsZfDm1taStart(SCNS_ZF_DM1TA_1,1);
#endif
    timer7Us=scnsTimerGetUs()-t;
    TIM_ClearInterruptStatus((TIM_Type*)TIM7,TIM_GetInterruptStatus((TIM_Type*)TIM7));
}

void TIM8_UP_IRQHandler(void)
{
    
    TIM_ClearInterruptStatus((TIM_Type*)TIM8,TIM_GetInterruptStatus((TIM_Type*)TIM8));
}

void UART1_IRQHandler(void)
{
    if(UART_INT_TX_EMPTY&UART_GetInterruptStatus(UART1))
    {
        
        UART_ClearInterruptStatus(UART1,UART_INT_TX_EMPTY);
    }
    if(UART_INT_RX_DONE&UART_GetInterruptStatus(UART1))
    {
        UART_ClearInterruptStatus(UART1,UART_INT_RX_DONE);
    }
    if(UART_INT_TX_EMPTY&UART_GetInterruptStatus(UART1))
    {
        
        UART_ClearInterruptStatus(UART1,UART_INT_TX_EMPTY);
    }
}

void UART2_IRQHandler(void)
{
    if(UART_INT_TX_EMPTY&UART_GetInterruptStatus(UART2))
    {
        
        UART_ClearInterruptStatus(UART2,UART_INT_TX_EMPTY);
    }
    if(UART_INT_RX_DONE&UART_GetInterruptStatus(UART2))
    {
        
        UART_ClearInterruptStatus(UART2,UART_INT_RX_DONE);
    }
}

void UART3_IRQHandler(void)
{
    if(UART_INT_TX_EMPTY&UART_GetInterruptStatus(UART3))
    {
        
        UART_ClearInterruptStatus(UART3,UART_INT_TX_EMPTY);
    }
    if(UART_INT_RX_DONE&UART_GetInterruptStatus(UART3))
    {
        
        UART_ClearInterruptStatus(UART3,UART_INT_RX_DONE);
    }
}

void UART4_IRQHandler(void)
{
    if(UART_INT_TX_EMPTY&UART_GetInterruptStatus(UART4))
    {
        
        UART_ClearInterruptStatus(UART4,UART_INT_TX_EMPTY);
    }
    if(UART_INT_RX_DONE&UART_GetInterruptStatus(UART4))
    {
        
        UART_ClearInterruptStatus(UART4,UART_INT_RX_DONE);
    }
}

void UART5_IRQHandler(void)
{
    if(UART_INT_TX_EMPTY&UART_GetInterruptStatus(UART5))
    {
        
        UART_ClearInterruptStatus(UART5,UART_INT_TX_EMPTY);
    }
    if(UART_INT_RX_DONE&UART_GetInterruptStatus(UART5))
    {
        
        UART_ClearInterruptStatus(UART5,UART_INT_RX_DONE);
    }
}

void UART6_IRQHandler(void)
{
    if(UART_INT_TX_EMPTY&UART_GetInterruptStatus(UART6))
    {
        
        UART_ClearInterruptStatus(UART6,UART_INT_TX_EMPTY);
    }
    if(UART_ISR_RXIDLEINTF_MASK&UART_GetInterruptStatus(UART6))
    {
#if defined(SCNS_SMCTP_ENABLE)&&SCNS_SMCTP_ENABLE==1
        scnsSmctpReceive(NULL,0);
#endif
        UART_ClearInterruptStatus(UART6,UART_ISR_RXIDLEINTF_MASK);
    }
    if(UART_INT_RX_DONE&UART_GetInterruptStatus(UART6))
    {
        
        UART_ClearInterruptStatus(UART6,UART_INT_RX_DONE);
    }
}

void UART7_IRQHandler(void)
{
    if(UART_INT_TX_EMPTY&UART_GetInterruptStatus(UART7))
    {
        
        UART_ClearInterruptStatus(UART7,UART_INT_TX_EMPTY);
    }
    if(UART_INT_RX_DONE&UART_GetInterruptStatus(UART7))
    {
        
        UART_ClearInterruptStatus(UART7,UART_INT_RX_DONE);
    }
}

void EXTI0_IRQHandler(void)
{
    
    EXTI_ClearLineStatus(EXTI,EXTI_LINE_0);
}

void EXTI1_IRQHandler(void)
{
    
    EXTI_ClearLineStatus(EXTI,EXTI_LINE_1);
}

void EXTI2_IRQHandler(void)
{
    
    EXTI_ClearLineStatus(EXTI,EXTI_LINE_2);
}

void EXTI3_IRQHandler(void)
{
    
    EXTI_ClearLineStatus(EXTI,EXTI_LINE_3);
}

void EXTI4_IRQHandler(void)
{
    
    EXTI_ClearLineStatus(EXTI,EXTI_LINE_4);
}

void EXTI9_5_IRQHandler(void)
{
    uint64 t=scnsTimerGetUs();
    if(EXTI->PR&(0x00000001<<5))
    {
        EXTI->PR|=(0x00000001<<5);
    }
    if(EXTI->PR&(0x00000001<<6))
    {
        EXTI->PR|=(0x00000001<<6);
    }
    if(EXTI->PR&(0x00000001<<7))
    {
        EXTI->PR|=(0x00000001<<7);
    }
    if(EXTI->PR&(0x00000001<<8))
    {
#if defined(SCNS_MT9V034_ENABLE)&&SCNS_MT9V034_ENABLE==1
        if(scnsTimerGetInitedMs()!=0)
        {
            scnsMt9v034VsyncInterrupt(SCNS_MT9V034_1);
        }
#endif
#if defined(SCNS_ZF_DM1RA_ENABLE)&&SCNS_ZF_DM1RA_ENABLE==1
        scnsZfDm1raInterruptL(SCNS_ZF_DM1RA_1);
#endif
        EXTI->PR|=(0x00000001<<8);
    }
    if(EXTI->PR&(0x00000001<<9))
    {
#if defined(SCNS_ZF_DM1RA_ENABLE)&&SCNS_ZF_DM1RA_ENABLE==1
        scnsZfDm1raInterruptS(SCNS_ZF_DM1RA_1);
#endif
        EXTI->PR|=(0x00000001<<9);
    }
    exti95Us=scnsTimerGetUs()-t;
}

void EXTI15_10_IRQHandler(void)
{
    if(EXTI_LINE_10&EXTI_GetLineStatus(EXTI))
    {
        
        EXTI_ClearLineStatus(EXTI,EXTI_LINE_10);
    }
    if(EXTI_LINE_11&EXTI_GetLineStatus(EXTI))
    {
        
        EXTI_ClearLineStatus(EXTI,EXTI_LINE_11);
    }
    if(EXTI_LINE_12&EXTI_GetLineStatus(EXTI))
    {
        
        EXTI_ClearLineStatus(EXTI,EXTI_LINE_12);
    }
    if(EXTI_LINE_13&EXTI_GetLineStatus(EXTI))
    {
        
        EXTI_ClearLineStatus(EXTI,EXTI_LINE_13);
    }
    if(EXTI_LINE_14&EXTI_GetLineStatus(EXTI))
    {
        
        EXTI_ClearLineStatus(EXTI,EXTI_LINE_14);
    }
    if(EXTI_LINE_15&EXTI_GetLineStatus(EXTI))
    {
        
        EXTI_ClearLineStatus(EXTI,EXTI_LINE_15);
    }
}

void DMA1_CH1_IRQHandler(void)
{
    uint32 channel_index=(DMA1_CHANNEL1&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA1_CH2_IRQHandler(void)
{
    uint32 channel_index=(DMA1_CHANNEL2&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA1_CH3_IRQHandler(void)
{
    uint32 channel_index=(DMA1_CHANNEL3&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA1_CH4_IRQHandler(void)
{
    uint32 channel_index=(DMA1_CHANNEL4&0x0F);
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
#if defined(SCNS_MT9V034_ENABLE)&&SCNS_MT9V034_ENABLE==1
        scnsMt9v034DmaFinishInterrupt(SCNS_MT9V034_1);
#endif
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA1_CH5_IRQHandler(void)
{
    uint32 channel_index=(DMA1_CHANNEL5&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
    
}

void DMA1_CH6_IRQHandler(void)
{
    uint32 channel_index=(DMA1_CHANNEL6&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA1_CH7_IRQHandler(void)
{
    uint32 channel_index=(DMA1_CHANNEL7&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA1_CH8_IRQHandler(void)
{
    uint32 channel_index=(DMA1_CHANNEL8&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
#if defined(SCNS_SMCTP_ENABLE)&&SCNS_SMCTP_ENABLE==1
        scnsSmctpSendFinishCallback();
#endif
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA1,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA1,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA2_CH1_IRQHandler(void)
{
    uint32 channel_index=(DMA2_CHANNEL1&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA2_CH2_IRQHandler(void)
{
    uint32 channel_index=(DMA2_CHANNEL2&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
#if defined(SCNS_ST7789_ENABLE)&&SCNS_ST7789_ENABLE==1
        spi_mosi_dma_wait(SPI_3);
        scnsSt7789AsyncCallback(SCNS_ST7789_1);
#endif
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA2_CH3_IRQHandler(void)
{
    uint32 channel_index=(DMA2_CHANNEL3&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
    
}

void DMA2_CH4_IRQHandler(void)
{
    uint32 channel_index=(DMA2_CHANNEL4&0x0F);
    //hxPrintfFL("DMA2CH4\n");
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA2_CH5_IRQHandler(void)
{
    uint32 channel_index=(DMA2_CHANNEL5&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA2_CH6_IRQHandler(void)
{
    uint32 channel_index=(DMA2_CHANNEL6&0x0F);
    //hxPrintfFL("DMA2CH6\n");
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        /*
        uint8*readBuf=(uint8*)dma_index[1]->CH[5].CMAR;
        SCB_InvalidateDCache_by_Addr((uint32_t*)readBuf,1024);
        uint8 same=1;
        for(uint32 i=0;i<1024;++i)
            if(readBuf[i]!='a'+(i)%26)
            {
                hxPrintfFL("%d %c %c",i,readBuf[i],'a'+(i)%26);
                same=0;
            }
        if(same)
            hxPrintfFL("same\n");
            */
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}

void DMA2_CH7_IRQHandler(void)
{
    uint32 channel_index=(DMA2_CHANNEL7&0x0F);
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
}

void DMA2_CH8_IRQHandler(void)
{
    uint32 channel_index=(DMA2_CHANNEL8&0x0F);
    
    if(DMA_CHN_INT_XFER_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_DONE);
    }
    
    if(DMA_CHN_INT_XFER_HALF_DONE&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_HALF_DONE);
    }
    
    if(DMA_CHN_INT_XFER_ERR&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_ERR);
    }
    
    if(DMA_CHN_INT_XFER_GLOBAL&DMA_GetChannelInterruptStatus(DMA2,channel_index))
    {
        
        DMA_ClearChannelInterruptStatus(DMA2,channel_index,DMA_CHN_INT_XFER_GLOBAL);
    }
}
